Design-Reuse

A Multiprocessor System-on-chip Architecture with Enhanced Compiler Support and Efficient Interconnect

This paper describes the development of a Multiprocessor System-on-Chip (MPSoC) with a novel interconnect architecture and an enhanced compiler support for programmability. Our MPSoC programming ...
Design-Reuse

A 24 Processors System on Chip FPGA Design with Network on Chip

In this paper we present a single FPGA chip implementation of a NOC based shared memory multiprocessor system with 24 processors connected to a main memory composed of 4 DDR2 banks. All the processors ...